1. Field of the Invention
The present invention relates to a semiconductor memory device, and more particularly relates to a semiconductor memory device that requires a refresh operation, such as a DRAM (Dynamic Random Access Memory).
2. Description of Related Art
As is well known, a DRAM, which is a typical semiconductor memory device, requires a periodical refresh operation to hold data. Meanwhile, a technique referred to as “partial refresh” has been proposed to satisfy the increasing demand for reducing the power consumption of the DRAM in recent years (see Japanese Patent Application Laid-open No. 2008-276878).
According to the “partial refresh”, a refresh operation is performed only on selected memory banks among a plurality of memory banks included in a DRAM, and the refresh operation is not performed on the rest of the memory banks. This technique enables omission of the refresh operation for memory banks which do not need to hold data, and thus it becomes possible to reduce the power consumption.
However, in the partial refresh technique described in Japanese Patent Application Laid-open No. 2008-276878, whether to perform a refresh operation can be designated only in a memory bank unit. Therefore, it is necessary to perform a refresh operation on all of the addresses for a memory bank in which there is only a small amount of data to be held, and thus a sufficient power-consumption reduction effect is not always provided.